Hardware Abstraction and Portability¶
The criterion. Minimizing vendor lock-in over a long project lifecycle: pre-ported Board Support Packages for your architecture, and a unified HAL for common peripherals (GPIO, UART, SPI, I2C, CAN) so switching chips doesn’t force an application rewrite.
How Revera answers it¶
Portability is a core strength; peripheral breadth is deliberately minimal in 0.1.0. The kernel is
portable across 10 CPU-architecture ports (ARM Cortex-M / -A / -R, RISC-V, AURIX TriCore, plus HAL-level
C2000 / MSP430) and 14 boards, behind a clean board contract: a board is one make/board/<name>.mk
fragment plus a small BSP, and adding a board or an arch is a drop-in .mk — nothing in the kernel changes.
The 0.1.0 HAL is intentionally small: console, GPIO, UART (TX), and clock/timer. A rich peripheral HAL exists
in the project’s history and is port-forward-ready (below).
Feature · how to turn it on · how to use it · where it works¶
Feature (in 0.1.0) |
Use these APIs |
Where |
|---|---|---|
GPIO / digital I/O |
|
all boards |
GPIO edge → IRQ |
|
boards with it |
UART (transmit) + console |
|
all boards |
Clock / timekeeping |
|
all boards |
Board bring-up |
|
all boards |
Full signatures and contracts: API reference — HAL.
Available from the project’s history (roadmap / on request — not in 0.1.0)¶
A full peripheral HAL and off-chip device layer were implemented (many HW-proven) before the reshape and can be ported forward. This is the port-ready inventory, honestly not shipping in 0.1.0:
On-chip peripherals: ADC (one-shot) · I²C (master + event-driven slave) · SPI (master) · PWM (per-mille duty) · GPT (application countdown timers) · ICU (input capture) · RTC (low-power counter) · UART receive ring · GPIOTE zero-CPU hardware routing (PPI) · on-die TEMP · RNG · CRC-16 · watchdog MCAL (mode-based).
Off-chip device drivers (board-independent): HD44780 LCD · MCP2515 CAN controller · PCF8574 I²C GPIO expander · PN532 NFC.
Each carried a portable MCAL-style contract (tk_<periph>_*) with per-board backends; see
HAL architecture §14 for the distillation rationale and the deferred
list, and the roadmap.
Limits¶
0.1.0’s HAL covers GPIO / UART-TX / timer / console only; UART receive and everything above is roadmap.
Portability (the arch/board contract) is the strength here, not peripheral coverage.
Learn more¶
How it works: HAL architecture · board contract · arch interface · board bring-up guide.
Full API: API reference.