Revera 0.1.0 — release manifest

What is in this release, what is not, and the compatibility promise attached to it. This is the authoritative inventory; the root README is the quick orientation and the readiness dashboard is the live per-feature, per-target status.

Release: Revera 0.1.0 (development release) · Vendor: VIACERTO LLC · see VERSION.

What’s in the box

Component

Where

What you get

Kernel core

kernel/

The portable scheduler, synchronization, timekeeping, trace, and config — constant across every target.

CPU-architecture ports (10)

arch/

ARM Cortex-M (v6-M / v7-M / v8-M), Cortex-A (v7-A / v8-A), Cortex-R (v8-R), RISC-V (RV32), Infineon AURIX TriCore, and HAL-level TI C2000 / MSP430. Plus pthread (desktop) and flat (no-switch, for tests).

Boards (14)

boards/ + make/board/

Desktop (host), QEMU virtual machines (ARM/RISC-V), and real hardware (nRF52, RP2040, AURIX TC275, i.MX8, …). make -C examples/threads boards lists them.

HAL

hal/

The minimal hardware abstraction: console, GPIO, UART, timer.

Examples (40)

examples/

One feature per directory, each with its own README — threading, sync, isolation, SMP/AMP, trace, faults, and the pthread compatibility demo.

Test harness

tests/ + root Makefile

Host unit suites (make test) + live-kernel QEMU arch suites (make test-arch).

Compatibility shims

compat/

An opt-in pthread-shaped layer (compat/pthread.h).

Documentation

docs/

Getting-started, the manual index, the API reference, 13 architecture docs, 5 ADRs, guides, and the roadmap.

Build system

make/

One .mk fragment per board and per arch; drop-in extensible.

Configuration

kernel/tk_config.h + profiles/

Every knob documented in one place; ready-made profiles nano → full.

License & legal

LICENSE, LICENSE-COMMERCIAL.md, NOTICE, CONTRIBUTING.md

The dual license, the commercial pointer, the notice, and the contribution terms.

Versioning

VERSION, CHANGELOG.md

SemVer + a Keep-a-Changelog history.

Revera’s kernel contains no third-party code — it is original work owned by VIACERTO LLC, which is what makes the dual license possible. The one exception is the optional SEGGER SystemView trace backend under tools/SEGGER/ — SEGGER’s code under SEGGER’s own license, compiled only when you enable SystemView (off by default).

Supported targets

Ports span ARM Cortex-M / -A / -R, RISC-V (RV32), and Infineon AURIX TriCore, with HAL-level support for TI C2000 and MSP430, and a desktop (host) build for development. Maturity varies by capability and target — the readiness dashboard is the authoritative matrix (proven-on-hardware vs emulator vs implemented). The isolation fence — Revera’s differentiator — is proven across five protection mechanisms and two classes; see the dashboard’s isolation section.

What is not in 0.1.0

0.1.0 is honestly scoped to the differentiated kernel + a minimal HAL. The following are on the roadmap, not in this release — named here so the scope is not implied to be larger than it is:

  • Broad peripheral / driver breadth (ADC, I²C, SPI, PWM, RTC, RNG, CRC, watchdog MCAL, …) and UART-RX.

  • The security and safety planes (crypto, verified boot, brownout/reset-reason, persistence, an ISO-26262-style safety lifecycle) — HW-proven in the project’s history, not re-integrated here.

  • Additional architectures and boards beyond those listed above.

  • A dedicated limitations/non-goals document and coding-guidelines document (the essentials live in the README status note, the CHANGELOG’s “Known limitations”, and CONTRIBUTING.md today).

Some configuration knobs and surfaces are marked experimental or are placeholders; the API reference and kernel/tk_config.h are the authoritative status for each.

Compatibility promise

  • Versioning: Semantic Versioning. Until 1.0.0 the API may change between minor versions; symbols tagged [experimental] in the API reference may change at any time.

  • Language / toolchain: the whole tree builds clean under -std=c99 -pedantic-errors -Wall -Wextra -Werror. Asking for a hardware feature a board or arch cannot provide fails loud at compile time.

  • ABI note (ADR 0001): stacks and RAM buffers are addressable cells (unsigned char), not uint8_t. The configuration profile is part of the ABI (it changes sizeof(struct tk_tcb)), so build directories are profile-tagged.

Verifying the release

make test        # host unit suites — no hardware, no cross-toolchain
make test-arch   # live-kernel context-switch + SMP under QEMU (needs cross-gcc + QEMU)

Both are green for this release. See getting-started to build and run.

License

Dual-licensed: free for noncommercial use under the PolyForm Noncommercial License 1.0.0, or under a commercial license from VIACERTO LLC.